Variable delay circuit and semiconductor integrated circuit device
US6049239A · kind A · utility
44Cited by
3References
36Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 22, 1997 |
| Grant date | Apr 11, 2000 |
| Priority date | — |
| Expiry date | Sep 22, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/033
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A variable delay circuit includes a first gate having a first delay amount, and a second gate having a second delay amount greater than the first delay amount. A difference between the first delay amount and the second delay time is less than the first delay amount.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.