Casing for integrated circuit chips and method of fabrication
US6049971A · kind A · utility
20Cited by
9References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 13, 1997 |
| Grant date | Apr 18, 2000 |
| Priority date | — |
| Expiry date | Jun 13, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49121
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a lead frame that includes a platform attached thereto for mounting a chip. A base frame is provided for mounting chips of various sizes. The base frame includes connection leads extending toward a central portion, which is substantially of the size of the smallest chip to mount. Connection leads are cut-out about the central portion to form an opening corresponding to the size of the chip to be mounted. A platform is soldered to at least two support leads to form the lead frame.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.