Lead frame, manufacturing method of a lead frame, semiconductor device, assembling method of a semiconductor device, and electronic apparatus
US6051450A · kind A · utility
45Cited by
2References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 30, 1998 |
| Grant date | Apr 18, 2000 |
| Priority date | — |
| Expiry date | Jun 30, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Metal films (for instance, gold films or palladium films) to constitute bumps are formed on a metal base by electrolytic plating. Then, a circuit wiring including inner leads is formed by electrolytic plating with a metal so that the inner leads are connected to the respective metal films.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.