Patent · US Expired

System and method for detecting shorts, opens and connected pins on a printed circuit board using automatic test equipment

US6051979A · kind A · utility

4Cited by
8References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 25, 1999
Grant dateApr 18, 2000
Priority date
Expiry dateJul 25, 2019

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/3191
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A method for testing node interconnection on a circuit board. The method utilizes an automated test system having at least one test channel, wherein each test channel has a digital driver with a first input and a first output, and a digital receiver with a second output and a second input. The second input of the receiver is coupled to the first output of the driver and to a test probe. The test probe is configured to couple the driver and receiver to one of a plurality of nodes on a circuit board. During a node interconnection test, a first selected node is coupled to a first test channel, and it is determined whether the first selected node is connected to ground. If the first selected node is not connected to ground, a second selected node is connected to ground; a test signal is applied to the first selected node via the digital driver of the first test channel; and it is determined whether the first selected node is connected to the second selected node.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.