Method of making a compliant multichip package
US6054337A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 12, 1997 |
| Grant date | Apr 25, 2000 |
| Priority date | — |
| Expiry date | Dec 12, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of making a multichip package includes providing a flexible substrate having a plurality of conductive traces and flexible leads connected to outer ends of the conductive traces adjacent the periphery of said flexible substrate. The flexible substrate includes conductive terminals accessible at a surface thereof connected to at least some of the conductive traces. The method includes providing a first microelectronic element having a front face including contacts and a back surface and assembling the front face thereof with the flexible substrate; depositing a compliant element over the back surface of the first microelectronic element; providing a second microelectronic element having a front face including contacts and assembling the front face thereof with the compliant element so that the second microelectronic element overlies the first microelectronic element; and electrically interconnecting the first and second microelectronic elements with one another and with the conductive terminals by connecting the flexible leads to the second microelectronic element and connecting at least some of the traces to the first microelectronic element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.