Programmable substrate for array-type packages
US6054767A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 13, 1998 |
| Grant date | Apr 25, 2000 |
| Priority date | — |
| Expiry date | Jan 13, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/173
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A programmable substrate and a method of making a programmable substrate for use with array-type packages, including Ball Grid Arrays(BGA), Pin Grid Arrays (PGA) and Column Grid Arrays (CGA) includes a nonconductive programmable substrate with a cavity in the top of the substrate. The cavity is sized to receive an integrated circuit (IC) die. An array of electrically conductive vias pass through the substrate. A plurality of electrical traces are formed on the top of the substrate. The traces extend radially from an edge of the die cavity to the periphery of the substrate so as to pass between and near the vias. Each trace is electrically connected to a pad of the IC die by a wire bond. Each via is connected on a bottom surface of the substrate to a solder ball, pin, or other means for electrically and mechanically attaching the substrate to a printed circuit board. The traces are programmably connected to a selected via, e.g., using wire bonds between the trace and a nearby selected via, thereby allowing each pad of the IC die to be selectively connected to a desired via, and hence to a selected solder ball or pin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.