Semiconductor device and method for manufacturing the same
US6060346A · kind A · utility
14Cited by
16References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 16, 1997 |
| Grant date | May 9, 2000 |
| Priority date | — |
| Expiry date | Sep 16, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device and a method for manufacturing the same that forms a self-aligned contact hole between two gate lines. A substrate is provided that has a first gate line formed thereon. An insulator is formed on the first gate line and substrate. Then a portion of the insulator and a portion of the first gate line is selectively removed to split the first gate line into a second gate line and a third gate line and to concurrently expose the substrate. Thus, producing a self-aligned contact hole between the second and third gate lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.