Handling interrupts by returning and requeuing currently executing interrupts for later resubmission when the currently executing interrupts are of lower priority than newly generated pending interrupts
US6061757A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 1997 |
| Grant date | May 9, 2000 |
| Priority date | — |
| Expiry date | Nov 13, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An information handling system includes one or more processing units, a data management unit, connected to the processor data bus, to a memory system, and to an I/O bus, an address management unit, connected to the processor address bus, to the memory system, and to an I/O bus. Data management unit also includes interrupt routing logic which snoops interrupt packets, stores the information in registers, and generates a signal indicating whether a particular interrupt was accepted or rejected. If the interrupt logic has a higher priority interrupt pending, the current interrupt packet will be returned to the requesting device using the interrupt return transaction, and the requesting device will accept the return transaction by decoding the bus unit ID field in the packet. The interrupt will be requeued and held in a pending status until an interrupt reissue transaction is transmitted by the interrupt routing logic and received by the interrupting I/O controller. Interrupts may be generated by any I/O device connected to any of I/O controllers on the I/O bus, or by a high speed I/O device connected to processor address bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.