Apparatus and method for reducing the number of rename registers required in the operation of a processor
US6061777A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 1997 |
| Grant date | May 9, 2000 |
| Priority date | — |
| Expiry date | Oct 28, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/384
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One aspect of the invention relates to a method for operating a processor. In one version of the invention, the method includes the steps of dispatching an instruction; determining a presently architected RMAP entry for the architectural register targeted by the dispatched instruction; selecting the RMAP entries which are associated with physical registers that contain operands for the dispatched instruction; updating a use indicator in the selected RMAP entries; determining whether the dispatched instruction is interruptible; and updating an architectural indicator and a historical indicator in the presently architected RMAP entry if the dispatched instruction is uninterruptible.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.