Method for making recessed field oxide for radiation hardened microelectronics
US6063690A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 1997 |
| Grant date | May 16, 2000 |
| Priority date | — |
| Expiry date | Dec 29, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76221
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a recessed electrically-insulating field oxide region in a semiconductor substrate is disclosed. In a preferred embodiment, the method includes the steps of oxidizing a surface of the substrate; depositing a polysilicon layer over the oxide layer; depositing a silicon nitride layer over the polysilicon layer; patterning the silicon nitride and polysilicon layers and etching away both layers where the field oxide is to be located; forming a field oxide by thermally oxidizing the substrate in the openings previously formed in the silicon nitride and polysilicon layers; etching away the thermal field oxide; thermally oxidizing the substrate in the etched-away field oxide areas; etching away the silicon nitride layer; optionally, implanting through the thermal oxide with an impurity; depositing a doped oxide; densifying the oxide in a steam ambient; etching back the deposited oxide; then either depositing an undoped CVD oxide, coating the oxide with a leveling layer to planarize the oxide surface, etching both the undoped CVD oxide and leveling layers and etching away the polysilicon; or etching away the polysilicon, leaching the dopants out of the surface of the fi…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.