Semiconductor device package including a substrate having bonding fingers within an electrically conductive ring surrounding a die area and a combined power and ground plane to stabilize signal path impedances
US6064113A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 13, 1998 |
| Grant date | May 16, 2000 |
| Priority date | — |
| Expiry date | Jan 13, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device package is presented for housing an integrated circuit which includes bonding fingers located within a conductive ring structure and routed to device terminals on an underside surface of the semiconductor device package. The semiconductor device package includes a die area defined upon a planar upper surface, a conductive ring surrounding the die area, and a first set of bonding fingers arranged within the conductive ring. The die area is dimensioned to receive the integrated circuit. The conductive ring may be a power ring or a ground ring. The conductive ring and the first set of bonding fingers are located within a first signal layer adjacent to the upper surface. A set of bonding pads which serve as device terminals reside within a second signal layer adjacent to a planar underside surface. The semiconductor device package also includes a first set of signal traces connected to bonding fingers within the first signal layer, a second set of signal traces connected to bonding pads within the second signal layer, and vias connecting members of the first and second sets of signal traces. The signal traces and vias form signal paths between members of the firs…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.