In-situ sequential silicon containing hard mask layer/silicon layer plasma etch method
US6069091A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 1997 |
| Grant date | May 30, 2000 |
| Priority date | — |
| Expiry date | Dec 29, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76224
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for etching a silicon layer within a microelectronics fabrication. There is first provided a substrate employed within a microelectronics fabrication. There is then formed over the substrate a blanket silicon layer. There is then formed upon the blanket silicon layer a blanket silicon containing hard mask layer, where the blanket silicon containing hard mask layer is formed from a silicon containing material chosen from the group of silicon containing materials consisting of silicon oxide materials, silicon nitride materials, silicon oxynitride materials and composites of silicon oxide materials, silicon nitride materials and silicon oxynitride materials. There is then formed upon the blanket silicon containing hard mask layer a patterned photoresist layer. There is then etched through a first plasma etch method the blanket silicon containing hard mask layer to form a patterned silicon containing hard mask layer while employing the patterned photoresist layer as a first etch mask layer. The first plasma etch method employs a first etchant gas composition comprising a first fluorine and carbon containing etchant source gas and a first bromine containing etchant source gas. …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.