Process to manufacture LDD TFT

US6071762A · kind A · utility

Assignee

• Industrial Technology Research Institute · TW

Inventors

• Hong-Woei Wu · Hsinchu, TW
• Yeong-E Chen · 東區, TW
• Gwo-Long Lin · Baoshan, TW

Key dates

• Filing date: Nov 16, 1998
• Grant date: Jun 6, 2000
• Expiry date: Nov 16, 2018

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/0321

Abstract

A process for manufacturing a TFT without the use of ion implantation is described. Instead, heavily doped layers of amorphous silicon are used as diffusion sources. Two embodiments of the invention are described. In the first embodiment the gate pedestal is deposited first, followed by gate oxide and an amorphous layer of undoped silicon. This is followed by the layer of heavily doped amorphous silicon which is subjected to a relatively low energy laser scan which drives in a small amount of dopant and converts it to N-. After the N+ layer has been patterned and etched to form source and drain electrodes, a second, higher energy, laser scan is given. This brings the source and drain very close to, but not touching, the channel, resulting in an LDD type of structure. In the second embodiment a layer of intrinsic polysilicon is used for the channel. It is covered with a layer of gate oxide and a metallic gate pedestal. As before, heavily doped N+ amorphous silicon is deposited over this and used as a source of dopant to produce an LDD structure similar to the first embodiment.