Etching process for producing substantially undercut free silicon on insulator structures
US6071822A · kind A · utility
47Cited by
5References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 31, 1998 |
| Grant date | Jun 6, 2000 |
| Priority date | — |
| Expiry date | Jul 31, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3065
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method of anisotropically plasma etching a silicon on insulator substrate wherein undercutting is substantially eliminated by utilizing as a finishing etch step a reactive ion etching process wherein the ion density is reduced in order to limit ion charging through different size recesses in order to uniformly etch in a vertical direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.