Downset lead frame for semiconductor packages
US6075283A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 6, 1998 |
| Grant date | Jun 13, 2000 |
| Priority date | — |
| Expiry date | Jul 6, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor lead frame, and a semiconductor package fabricated using the lead frame, are provided. The lead frame includes side rails; patterns of lead fingers; and multiple die mounting paddles. Each die mounting paddle is configured to mount a semiconductor die for wire bonding to an associated pattern of lead fingers. In addition, each die mounting paddle includes support members on opposing sides, each having at least two downset segments. The downset segments of the support members offset the die mounting paddles from the lead fingers. In a first lead frame embodiment, the support members include downset segments oriented at opposing angles with respect to a longitudinal axes of the mounting paddles. In a second embodiment, the support members include two or more downset segments oriented along axes that are generally parallel to the die mounting paddles.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.