Low-cost surface-mount compatible land-grid array (LGA) chip scale package (CSP) for packaging solder-bumped flip chips
US6075710A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 11, 1999 |
| Grant date | Jun 13, 2000 |
| Priority date | — |
| Expiry date | Feb 11, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention discloses a novel electronic package. This semiconductor packaging assembly is for supporting and containing an integrated circuit (IC) chip. The IC chip is supported on a single core double-layer substrate as a flip chip which is solder-bumped with low melting point solder, e.g., a 63 wt % Sn-37 wt % Pb eutectic solder. The flip chip is supported on a single core double-sided FR-4/5 or BT substrate provided with via holes to form via connections interconnecting the solder bumps to a land grid array disposed on the bottom surface of the substrate. The substrate is then surface mounted and soldered onto a printed circuit board which again is provided with low temperature 63 wt % Sn-37 wt % Pb eutectic solder paste for securely attaching the LGA CSP. Simplified processes are employed to assemble the electronic package with high yield processing steps, which can be conveniently carried out. CSP package with high reliability and improved performance characteristics can be achieved with a reduced production cost. This invention further discloses a tape-substrate provided for interposing between a semiconductor chip and a printed circuit board (PCB). The tape substr…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.