Method and circuit for generating an ATD signal to regulate the access to a non-volatile memory
US6075750A · kind A · utility
2Cited by
8References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 4, 1998 |
| Grant date | Jun 13, 2000 |
| Priority date | — |
| Expiry date | Nov 4, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and a circuit generate a pulse synchronization signal (ATD) for timing the memory cell read phase in semiconductor integrated electronic memory devices. The pulse signal (ATD) is generated upon detection of a change in logic state of at least one of a plurality of address input terminals of the memory cells. The method consists of duplicating the ATD signal into at least one pair of signals and propagating such signals through separate parallel timing chains at the ends of which the ATD signal is reinstated, the chains being alternately active.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.