Patent · US Expired

Method and apparatus for continuous column density optimization

US6075933A · kind A · utility

10Cited by
17References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 6, 1997
Grant dateJun 13, 2000
Priority date
Expiry dateAug 6, 2017

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F30/392
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Integrated circuit chips (IC's) require proper placement of many cells (groups of circuit components) and complex routing of wires to connect the pins of the cells. Because of the large number of the cells and the complex connections required, it is essential that placement of the cell and the wire routine be done correctly to avoid any congestion of wires. The present invention discloses method and apparatus to optimize the cell density of the segments of columns on the IC. To optimize the segment or column density, the present columns densities are calculated, and the desired densities are determined. Then, the amount and the location of the of cell overload is found. The cells of the overloaded columns are spread out the neighboring columns. The reassignment of the cells are performed to minimize the distance, therefore the affect, of the relocation. To minimize the distance of relocation, the free spaces of the neighbors of the overloaded columns are identified, and the free spaces of the closest neighbors are used first, then the next closest, and so-on until the cells contributing to the overload are distributed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.