High-speed compound semiconductor device having an improved gate structure
US6078071A · kind A · utility
15Cited by
6References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 9, 1999 |
| Grant date | Jun 20, 2000 |
| Priority date | — |
| Expiry date | Jun 9, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/411
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a gate structure formed on a substrate in which an LDD structure is formed, wherein gate structure includes a Schottky electrode making a Schottky contact with a channel region in the substrate, a low-resistance layer provided above the Schottky electrode, and a stress-relaxation layer interposed between the Schottky electrode and the stress-relaxation layer. The low-resistance layer and said stress-relaxation layer form an overhang structure with respect to the Schottky electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.