Power-on reset circuit for dual supply voltages
US6078201A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 6, 1998 |
| Grant date | Jun 20, 2000 |
| Priority date | — |
| Expiry date | Jan 6, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/223
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power-on reset circuit is provided which uses a dual voltage detection circuit to output a voltage detection signal. The dual voltage detection circuit is coupled to a first supply voltage terminal, a second supply voltage terminal, and a ground terminal. The voltage detection signal indicates whether the first supply voltage provided on the first supply voltage terminal is greater than an adequate voltage level. Furthermore, the voltage detection signal is driven by circuits powered by a second supply voltage provided on the second supply voltage terminal. One embodiment of the dual-voltage detection circuit comprises a first transistor coupled in series with a second transistor between the first supply voltage terminal and the ground terminal, as well as a third transistor coupled in series with a fourth transistor between the second supply voltage terminal and the ground terminal. Furthermore, some embodiments of the present invention also include a low pass filter coupled to the dual-voltage detection circuit to prevent spurious noise and ground bounces from causing a reset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.