Electro-static discharge protection device having a modulated control input terminal
US6078487A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 9, 1997 |
| Grant date | Jun 20, 2000 |
| Priority date | — |
| Expiry date | May 9, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/08142
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit which protects an integrated circuit (IC) device from damage due to electrostatic discharge (ESD). The protection circuit includes an N-channel metal oxide semiconductor field effect transistor (MOSFET) clamping device and a gate modulation circuit. The source and drain of the MOSFET clamp are connected between an input/output (I/O) pad of the IC and a ground reference voltage. During normal operation of the IC, the gate modulation circuit disables the MOSFET clamp by connecting its gate terminal to a ground reference voltage. This permits signal voltages to pass between the I/O pad and any operating circuits connected to the pad. During an ESD event, the gate modulation circuit connects the gate to the I/O pad, which enables the MOSFET clamp, causing any ESD voltages and resulting currents to be shunted through the MOSFET clamp to ground. As a result, the ESD clamp reaches its clamped-to snapback voltage via an increase in MOSFET channel current, and not via junction breakdown. This insures that the ESD clamp reaches its snapback voltage before the onset of junction breakdown in the operating circuits. The circuit is especially useful in integrated circuits where the gat…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.