William McGee
15Patents
6h-index
29Co-inventors
66Inventor score
Filing activity: Jan 11, 1996 → Jun 15, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6078487A | Electro-static discharge protection device having a modulated control input terminal | Electricity | 27 | Expired |
| US6363471B1 | Mechanism for handling 16-bit addressing in a processor | Physics | 16 | Expired |
| US10747844B2 | Systems and methods for converting a matrix input to a vectorized input for a matrix processor | Physics | 8 | Active |
| US5695389A | Blasting device with oscillating nozzle | Performing Operations; Transporting | 8 | Expired |
| US11157441B2 | Computational array microprocessor system using non-consecutive data formatting | Physics | 8 | Active |
| US9575891B2 | Sidecar SRAM for high granularity in floor plan aspect ratio | Physics | 6 | Active |
| US8347250B2 | Method and apparatus for addressing and improving holds in logic networks | Physics | 5 | Active |
| US8010920B2 | Constraint management and validation for template-based circuit design | Physics | 5 | Active |
| US6807107B1 | Semiconductor memory with shadow memory cell | Physics | 4 | Expired |
| US11681649B2 | Computational array microprocessor system using non-consecutive data formatting | Physics | 2 | Active |
| US6798712B2 | Wordline latching in semiconductor memories | Physics | 1 | Expired |
| US11227029B2 | Scalable matrix node engine with configurable data formats | Physics | 1 | Active |
| US11901310B2 | Electronic assembly | Electricity | 0 | Active |
| US6760855B1 | System and method for reducing a ground bounce during write by selectively delaying address and data lines with different multiple predetermined amount of delay | Electricity | 0 | Expired |
| US12216610B2 | Computational array microprocessor system using non-consecutive data formatting | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.