Method and device for initiating a memory array during power up
US6078539A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 4, 1999 |
| Grant date | Jun 20, 2000 |
| Priority date | — |
| Expiry date | Feb 4, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is a device and method for a semiconductor array which attempts to ensure that, during power up, a reference cell becomes valid after one or more data cells. The array includes at least one data cell, at least one cell common line to which the data cell is connected, at least one reference cell, a reference common line to which the references cell is connected and a voltage differentiator. The voltage differentiator is connected to the cell and reference common lines and receives a powering-up power supply voltage from a power supply. The voltage differentiator provides a reference voltage to the reference common line and a cell voltage to the at least one cell common line, wherein the reference voltage is lower than the cell voltage by a predetermined voltage gap.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.