Patent · US Expired

Overlay alignment measurement of wafers

US6079256A · kind A · utility

144Cited by
4References
6Claims
0Family size

Assignee

Inventor

Key dates

Filing dateDec 7, 1998
Grant dateJun 27, 2000
Priority date
Expiry dateDec 7, 2018

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L22/12
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The present invention is a method and apparatus that uses a microscopic height variation positioned relative to a semiconductor device to scan a target on the device to produce an electrical signal representative of height variations of first and second periodic structures of the target in a selected path across the device, and a computing and control system to provide translation between the microscopic height variation detector and the target on the device in a selected path, and to calculate any offset between the first periodic structure and the second periodic structure of the target from the electrical signals from the microscopic height variation detector. The first periodic structure of the target is on a first layer of the device, and the second periodic structure, that complements the first periodic structure, is on a second layer of the device at a location that is adjacent the first periodic structure.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.