Clock distribution network with efficient shielding
US6081022A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 1999 |
| Grant date | Jun 27, 2000 |
| Priority date | — |
| Expiry date | May 24, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09809
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An interconnect structure includes in a first layer a clock line and a ground line running substantially parallel to the clock line, and a plurality of conductive regions lying in a second layer parallel to the first layer. The ground line is coupled to a source of ground potential. The conductive regions are aligned with the clock line and are disposed around a signal line routed in the second layer across the clock line. The conductive regions are electrically connected to the ground line, thereby forming a shield for the clock line that helps prevent clock signals propagated on the clock line from electromagnetically coupling with other signal lines. In one embodiment, a clock distribution network includes conductive regions (501, 503, 505 . . . ) in the metal layer below the clock line layer and two parallel ground lines (201, 203) in the same metal layer as the clock line (101). The conductive regions (501, 503, 505 . . . ) are electrically connected to the ground lines (201, 203) with vias (603A, 603B, 605A, 605B . . . ). In the same metal layer as the conductive regions, conductive signal lines (509, 511) are routed between the regions (501, 503, 505, 507 . . . ) to cross be…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.