Method for manufacturing compound semiconductor field-effect transistors with improved DC and high frequency performance
US6083781A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 1, 1997 |
| Grant date | Jul 4, 2000 |
| Priority date | — |
| Expiry date | Oct 1, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0612
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for making compound semiconductor devices including the use of a p-type dopant is disclosed wherein the dopant is co-implanted with an n-type donor species at the time the n-channel is formed and a single anneal at moderate temperature is then performed. Also disclosed are devices manufactured using the method. In the preferred embodiment n-MESFETs and other similar field effect transistor devices are manufactured using C ions co-implanted with Si atoms in GaAs to form an n-channel. C exhibits a unique characteristic in the context of the invention in that it exhibits a low activation efficiency (typically, 50% or less) as a p-type dopant, and consequently, it acts to sharpen the Si n-channel by compensating Si donors in the region of the Si-channel tail, but does not contribute substantially to the acceptor concentration in the buried p region. As a result, the invention provides for improved field effect semiconductor and related devices with enhancement of both DC and high-frequency performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.