Lead silicate based capacitor structures
US6090659A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 1999 |
| Grant date | Jul 18, 2000 |
| Priority date | — |
| Expiry date | May 19, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/022
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A capacitor and method of making is described incorporating a semiconductor substrate, a bottom electrode formed on or in the substrate, a dielectric layer of barium or lead silicate, and a top electrode. A sandwich dielectric of a barium or lead silicate and a high dielectric constant material such as barium or lead titanate may comprise the dielectric. The silicate layer may be formed by evaporating and diffusing, ion implanting, or electroplating and diffusing barium or lead. The high epsilon dielectric constant material may be formed by sol gel deposition, metal organic chemical vapor deposition or sputtering. The invention overcomes the problem of a bottom electrode and dielectric layer which chemically interact to form a silicon oxide layer in series or below the desired dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.