Integrated circuit having crack stop for interlevel dielectric layers
US6091131A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 28, 1998 |
| Grant date | Jul 18, 2000 |
| Priority date | — |
| Expiry date | Apr 28, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The propagation of a crack from the surface of the dielectric layer of an integrated circuit, through to the underlying circuit elements, is prevented by controlling the interface between the outermost, dielectric layer or layers and the inner layer or layers of the integrated circuit construction. The interface is weakened so that a crack that encounters the interface is caused to propagate in a horizontal manner, along the interface, preventing propagation of the crack in a direction that would be harmful to the manufactured article. This is preferably accomplished with multiple layers of material, each of which is made capable of redirecting (deflecting) the crack. Deflection of the crack, and arrest of the deflected crack along the interface, is made possible by controlling the fracture resistance of the interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.