Stephen E. Greco
65Patents
13h-index
103Co-inventors
87Inventor score
Filing activity: Apr 22, 1985 → Jan 5, 2018
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6140234A | Method to selectively fill recesses with conductive metal | Electricity | 342 | Expired |
| US6573606B2 | Chip to wiring interface with single metal alloy layer applied to surface of copper interconnect | Electricity | 258 | Expired |
| US6451712B1 | Method for forming a porous dielectric material layer in a semiconductor device and device formed | Electricity | 71 | Expired |
| US5371047A | Chip interconnection having a breathable etch stop layer | Emerging Cross-Sectional Technologies | 60 | Expired |
| US5444015A | Larce scale IC personalization method employing air dielectric structure for extended conductors | Electricity | 57 | Expired |
| US5928960A | Process for reducing pattern factor effects in CMP planarization | Electricity | 31 | Expired |
| US4997746A | Method of forming conductive lines and studs | Emerging Cross-Sectional Technologies | 28 | Expired |
| US6917108B2 | Reliable low-k interconnect structure with hybrid dielectric | Electricity | 25 | Expired |
| US4600683A | Cross-linked polyalkenyl phenol based photoresist compositions | Emerging Cross-Sectional Technologies | 23 | Expired |
| US6784105B1 | Simultaneous native oxide removal and metal neutral deposition method | Electricity | 23 | Expired |
| US6091131A | Integrated circuit having crack stop for interlevel dielectric layers | Electricity | 21 | Expired |
| US5530290A | Large scale IC personalization method employing air dielectric structure for extended conductor | Electricity | 19 | Expired |
| US6121129A | Method of contact structure formation | Electricity | 15 | Expired |
| US7439173B2 | Increasing electromigration lifetime and current density in IC using vertically upwardly extending dummy via | Electricity | 13 | Active |
| US7301236B2 | Increasing electromigration lifetime and current density in IC using vertically upwardly extending dummy via | Electricity | 12 | Expired |
| US7071099B1 | Forming of local and global wiring for semiconductor product | Electricity | 11 | Expired |
| US6221780A | Dual damascene flowable oxide insulation structure and metallic barrier | Electricity | 11 | Expired |
| US6174814A | Method for producing a crack stop for interlevel dielectric layers | Electricity | 10 | Expired |
| US6734096B2 | Fine-pitch device lithography using a sacrificial hardmask | Electricity | 10 | Expired |
| US7135398B2 | Reliable low-k interconnect structure with hybrid dielectric | Electricity | 9 | Expired |
| US7488679B2 | Interconnect structure and process of making the same | Electricity | 9 | Active |
| US7300825B2 | Customizing back end of the line interconnects | Electricity | 7 | Expired |
| US9589911B1 | Integrated circuit structure with metal crack stop and methods of forming same | Electricity | 7 | Active |
| US7253098B2 | Maintaining uniform CMP hard mask thickness | Electricity | 7 | Expired |
| US7949981B2 | Via density change to improve wafer surface planarity | Emerging Cross-Sectional Technologies | 5 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.