Ferroelectric memory and method for preventing aging in a memory cell
US6091625A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 1999 |
| Grant date | Jul 18, 2000 |
| Priority date | — |
| Expiry date | Sep 28, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated memory includes a cell array having bit lines, word lines and writable memory cells. A first differential sense amplifier has connections connected to a data line pair through which the first sense amplifier reads information from one of the memory cells during a read access operation in order to amplify it subsequently, and through which the first sense amplifier writes information to one of the memory cells during a write access operation. The relevant information is transferred as differential signals through the data line pair and is temporarily stored by the first sense amplifier during every write access operation. The memory also has a switching unit through which the data line pair is connected to the connections of the first sense amplifier, for interchanging the lines of the data line pair in relation to the connections of the first sense amplifier, depending on the switching state of the switching unit. The switching state of the switching unit is changed at least once during a write access operation, so that the information to be written is written to the relevant memory cell by the first sense amplifier initially in noninverted form and then in inverted f…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.