Inventor · Starnberg, DE

Heinz Honigschmid

40Patents
9h-index
18Co-inventors
64Inventor score

Filing activity: Sep 28, 1999 → Jan 5, 2006

Most-cited inventions

PatentTitleAreaCited byStatus
US6353562B2 Integrated semiconductor memory with redundant units for memory cells Physics 35 Expired
US6424563B2 MRAM memory cell Physics 25 Expired
US6741513B2 Data memory with a plurality of memory banks Physics 20 Expired
US6091625A Ferroelectric memory and method for preventing aging in a memory cell Physics 17 Expired
US6452852B2 Semiconductor memory configuration with a refresh logic circuit, and method of refreshing a memory content of the semiconductor memory configuration Physics 14 Expired
US6292386A Integrated memory having cells of the two-transistor/two-capacitor type Physics 13 Expired
US6351422B2 Integrated memory having a differential sense amplifier Physics 12 Expired
US6577528B2 Circuit configuration for controlling write and read operations in a magnetoresistive memory configuration Physics 12 Expired
US6664158B2 Ferroelectric memory configuration and a method for producing the configuration Electricity 9 Expired
US6545526B2 Fuse circuit configuration Physics 7 Expired
US6392918B2 Circuit configuration for generating a reference voltage for reading a ferroelectric memory Physics 6 Expired
US6137712A Ferroelectric memory configuration Physics 5 Expired
US6477078B2 Integrated memory having memory cells that each include a ferroelectric memory transistor Physics 4 Expired
US7499344B2 Integrated circuit memory having a read circuit Physics 4 Active
US6307771A Integrated memory having 2-transistor/2-capacitor memory cells Physics 3 Expired
US6504747B2 Integrated memory with plate line segments Physics 3 Expired
US6487128B2 Integrated memory having memory cells and reference cells, and operating method for such a memory Physics 2 Expired
US6459626B1 Integrated memory having memory cells and reference cells, and corresponding operating method Physics 2 Expired
US6294294A Implantation mask for producing a memory cell configuration Electricity 2 Expired
US6803618B2 MRAM configuration having selection transistors with a large channel width Physics 2 Expired
US6424558B2 Ferroelectric memory array composed of a multiplicity of memory cells each having at least one selection transistor and one storage capacitor driven via word lines and bit lines Physics 2 Expired
US6434039B1 Circuit configuration for reading a memory cell having a ferroelectric capacitor Physics 1 Expired
US6396750B2 Integrated memory with redundancy and method for repairing an integrated memory Physics 1 Expired
US6480044B2 Semiconductor circuit configuration Physics 1 Expired
US6480055B2 Decoder element for generating an output signal having three different potentials and an operating method for the decoder element Electricity 1 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.