Method for mapping product terms in a complex programmable logic device
US6091892A · kind A · utility
26Cited by
4References
15Claims
0Family size
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Key dates
| Filing date | Nov 13, 1996 |
| Grant date | Jul 18, 2000 |
| Priority date | — |
| Expiry date | Nov 13, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for programming complex programmable logic devices (CPLDs) to implement a logic function, whereby user-designated locked equations of the logic function are mapped into the macrocells of a function block, and then undesignated (non-locked) equations are mapped into the remaining macrocells. The method shifts product terms between the macrocells to adjust the placement arrangement of the mapped equations, thereby obtaining a placement arrangement which is both valid and meets user-defined timing constraints.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.