Sensing circuit for programming/reading multilevel flash memory
US6097635A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 24, 1999 |
| Grant date | Aug 1, 2000 |
| Priority date | — |
| Expiry date | Aug 24, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5644
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A sensing circuit for programming/reading a multilevel flash memory includes a voltage controller for controlling a voltage being applied to a drain of a selected cell, a reference voltage generator for generating a reference voltage, a comparator with its one terminal applied by the voltage at the drain connected in common to the PMOS transistor and the NMOS transistor and the other terminal thereof applied by the reference voltage of the reference voltage generator, a sense amplifier driving determinator for determining whether to receive and program 2-bit information during the programming and stopping the operation of the comparator and the voltage controller during completion of the programming, a register array having the same number of registers as the number of information bits of a cell array for one sense amplifier to process so as to provide the 2-bit information to the sense amplifier driving determinator at respective steps during the reading, and a counter unit for generation an 2-bit output for determining the data being stored in the register array at respective steps during the read mode. The circuit employs a simplified sense amplifier using one comparison circuit…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.