Process for the removal of copper from polished boron doped silicon wafers
US6100167A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 21, 1998 |
| Grant date | Aug 8, 2000 |
| Priority date | — |
| Expiry date | May 21, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3221
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for removing copper from a boron doped, polished silicon wafer which contains copper on its polished surface and in its interior. In the process, the wafer is annealed at a temperature of at least about 75.degree. C. to increase the concentration of copper on the polished surface of the wafer and decrease the concentration of copper in the interior of the wafer. The polished surface of the annealed wafer is then cleaned to reduce the concentration of copper thereon. In addition, the annealing step is carried out at a temperature and a time such that the concentration of copper on the polished surface of the silicon will not increase by a factor of more than two upon storage of the annealed and cleaned wafer at room temperature for a period of 5 months.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.