Stable and low resistance metal/barrier/silicon stack structure and related process for manufacturing
US6100188A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 1998 |
| Grant date | Aug 8, 2000 |
| Priority date | — |
| Expiry date | Jul 1, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28061
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A metal-poly stack gate structure and associated method for forming a conductive barrier layer between W and poly in the metal-gate stack gate structure. The process includes the steps of depositing doped silicon on a substrate; forming nitride on the deposited silicon; depositing a metal on the nitride to form a metal/nitride/deposited silicon stack; and thermally treating the stack to transform the nitride into a conductive barrier layer between the metal and the deposited silicon. The thermal treatment transforms the nitride layer (SiN.sub.x or SiN.sub.x O.sub.y) into a conductive barrier (WSi.sub.x N.sub.y or WSi.sub.x N.sub.y O.sub.z) to form a W/barrier/poly stack gate structure. The barrier layer blocks reaction between W and Si, enhances sheet resistance, enhances adhesion between the W and the poly, and is stable at high temperatures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.