High breakdown voltage resurf HFET
US6100549A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 12, 1998 |
| Grant date | Aug 8, 2000 |
| Priority date | — |
| Expiry date | Aug 12, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
Abstract
A high breakdown voltage HFET includes a reduced surface field (RESURF) layer of p-type conductivity GaN positioned on a substrate with a channel layer of n-type conductivity GaN positioned thereon. A barrier layer of n-type conductivity Al.sub.x Ga.sub.1-x N is positioned on the channel layer to form a lateral channel adjacent to and parallel with the interface. A gate electrode is positioned on the barrier layer overlying the lateral channel and a drain electrode is positioned on the channel layer in contact with the lateral channel and spaced to one side of the gate electrode a distance which determines the breakdown voltage. A source electrode is positioned on the channel layer to the opposite side of the gate electrode, in contact with the lateral channel and also in contact with the RESURF layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.