Patent · US Expired

Integrated memory

US6101141A · kind A · utility

4Cited by
7References
1Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 28, 1999
Grant dateAug 8, 2000
Priority date
Expiry dateJun 28, 2019

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C11/4096
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The integrated memory has a data line pair, which is connected to a bit line pair via at least one differential amplifier. In addition, it has a control unit for setting first potential states on the data line pair which correspond to the differential signals of data to be written to the memory cells, and for setting at least one second potential state on the data line pair which does not correspond to any datum to be written to the memory cells. Furthermore, it has a detector unit having two inputs connected to the data line pair. The detector unit initiates a specific control function when the second potential state of the data line pair occurs.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.