Semiconductor device and method of manufacture
US6103548A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 17, 1997 |
| Grant date | Aug 15, 2000 |
| Priority date | — |
| Expiry date | Sep 17, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate (10) that can be cut into different sizes. A plurality of wirebond fingers (12) are formed on a top surface (13) of the substrate (10). The plurality of wirebond fingers (12) are located within concentric interconnect regions (23, 25, 27, 29, 31, 33, 35) and electrically connected to a via (14) by a signal interconnect line (11). The size of substrate (10) can be altered by cutting the substrate (10) to remove any of the interconnect regions (23, 25, 27, 29, 31, 33, 35). A semiconductor component (44) attached to the top side (13) of the substrate (10) can have a die pad (48) wirebonded to any of the plurality of wirebond fingers (12) located along the signal interconnect line (11) for connection to the via (14).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.