Method for producing shallow trench isolation structure
US6103581A · kind A · utility
7Cited by
8References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 27, 1998 |
| Grant date | Aug 15, 2000 |
| Priority date | — |
| Expiry date | Nov 27, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76224
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating shallow trench isolation stricture wherein a surface oxide layer and a polycrystalline silicon buffer layer are formed on a semiconductor body. Openings are formed through the layers and into the body that constitute trenches. A lining oxide layer is formed on the trench and buffer layer surfaces. A thick oxide layer is deposited on the body to fill the trench, and the layer planarized by chemical-mechanical polishing. The exposed portions of the buffer layer are removed and the horizontal surface oxide layer portions removed by anisotropic etching.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.