Method for forming interconnect bumps on a semiconductor die
US6107180A · kind A · utility
109Cited by
3References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 30, 1998 |
| Grant date | Aug 22, 2000 |
| Priority date | — |
| Expiry date | Jan 30, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49149
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming an interconnect bump structure (32, 33). Under Bumb Metalization 11 (UBM) comprising a chrome layer (16), a copper layer (36), and a tin layer (40) is disclosed. In one embodiment, eutectic solder (45) is then formed over the UBM (11) and reflowed in order to form the interconnect bump stucture. In another embodement, a lead standoff (46) is formed over the UBM (11) before the formation of the eutectic solder (48).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.