Semiconductor device and method of manufacturing same
US6107661A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 1996 |
| Grant date | Aug 22, 2000 |
| Priority date | — |
| Expiry date | Sep 27, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/663
Abstract
A concave channel type DMOS structure having an improved gate-to-source breakdown voltage are disclosed. By establishing a curvature at a corner portion of a lattice-like pattern in a groove portion for forming the concave channel structure, the shape of the tip of a three-dimensionally projecting portion of a semiconductor region determined by a plane angle of the corner portion in the lattice-like pattern and an inclination of the groove portion is rounded. That is, a three-dimensionally sharpened corner portion in the concave channel structure is rounded, and thereby electric field concentration at the corner portion is suppressed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.