Method and apparatus for a logic circuit with constant power consumption
US6107835A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 10, 1998 |
| Grant date | Aug 22, 2000 |
| Priority date | — |
| Expiry date | Dec 10, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1006
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention comprises a method and apparatus for a logic circuit with constant power consumption. The logic circuit comprises a 1 of P first input signal that further comprises a plurality of wires wherein each wire of said plurality of wires has equal capacitive loading. The logic circuit additionally comprises a 1 of Q second input signal that comprises a plurality of wires wherein each wire of said plurality of wires has equal capacitive loading. A logic tree circuit couples to the first input signal and the second input signal. The logic tree circuit generates a result for a 1 of R output signal, which couples to the logic tree circuit. The 1 of R output signal comprises a plurality of wires wherein each wire of said plurality of wires has equal capacitive loading. The power consumption of the logic circuit is independent of the value of the first signal or the second signal, which results in the logic circuit having constant power consumption. Additionally, the logic circuit has a consistent current demand. The present invention provides that exactly one wire of the plurality of wires of the output signal is charged and discharged every clock cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.