Process for fabricating semiconductor device with shallow p-type regions using dopant compounds containing elements of high solid solubility
US6109207A · kind A · utility
1Cited by
14References
8Claims
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Key dates
| Filing date | Oct 28, 1997 |
| Grant date | Aug 29, 2000 |
| Priority date | — |
| Expiry date | Oct 28, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/601
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor having at least one p-channel transistor (10) with shallow p-type doped source/drain regions (16 and 18) which contain boron implanted into the doped regions (16 and 18) in the form of a compound which consists of boron and an element (or elements) selected from the group which consists of element of substrate (21) and elements which forms a solid solution with the substrate (21). In particular, in the case of silicon substrate, the compound may comprise BSi2, B2Si, B4Si and B6Si. The use of such compounds enables the highly reliable contacts to be formed on the p-doped regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.