Method for forming a notched gate oxide asymmetric MOS device
US6110783A · kind A · utility
60Cited by
10References
10Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 27, 1997 |
| Grant date | Aug 29, 2000 |
| Priority date | — |
| Expiry date | Jun 27, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/981
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for making an asymmetric MOS device having a notched gate oxide wherein a region of the gate oxide adjacent to either the source or drain is thinner than the remainder of the gate oxide. The resulting MOS device includes a channel under the notched region of the gate oxide with a relatively high concentration of mobile charge carriers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.