Apparatus and method for generating configuration and test files for programmable logic devices
US6112020A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 27, 1997 |
| Grant date | Aug 29, 2000 |
| Priority date | — |
| Expiry date | May 27, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318516
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An apparatus and method for generating configuration and test files for programmable logic devices includes a dynamic configuration and test generation program to specify, in source code, a logic function to be implemented by a programmable logic device. A device test development kernel program has information characterizing physical elements of the programmable logic device and bit patterns for implementing connections between the physical elements of the programmable logic device. The device test development kernel program converts the logic function into a configuration file for use in programming the logic function into the programmable logic device. The dynamic configuration and test generation program also specifies, in source code, a test operation to be executed by the programmable logic device. It operates with the device test development kernel program to produce a vector file for use in testing the programmable logic device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.