Adam Wright
26Patents
8h-index
43Co-inventors
75Inventor score
Filing activity: May 27, 1997 → Sep 29, 2017
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8341745B1 | Inferring file and website reputations by belief propagation leveraging machine reputation | Physics | 113 | Active |
| US6112020A | Apparatus and method for generating configuration and test files for programmable logic devices | Physics | 30 | Expired |
| US6938236B1 | Method of creating a mask-programmed logic device from a pre-existing circuit design | Physics | 22 | Expired |
| US5909450A | Tool to reconfigure pin connections between a dut and a tester | Physics | 21 | Expired |
| US8701190B1 | Inferring file and website reputations by belief propagation leveraging machine reputation | Physics | 18 | Active |
| US7884619B1 | Method and apparatus for minimizing skew between signals | Electricity | 11 | Active |
| US7020582B1 | Methods and apparatus for laser marking of integrated circuit faults | Physics | 10 | Expired |
| US7671579B1 | Method and apparatus for quantifying and minimizing skew between signals | Electricity | 8 | Active |
| US9171253B1 | Identifying predictive models resistant to concept drift | Physics | 8 | Active |
| US7024327B1 | Techniques for automatically generating tests for programmable circuits | Physics | 6 | Expired |
| US7409669B1 | Automatic test configuration generation facilitating repair of programmable circuits | Physics | 6 | Expired |
| US7546507B1 | Method and apparatus for debugging semiconductor devices | Physics | 5 | Active |
| US7768280B1 | Apparatus for a low-cost semiconductor test interface system | Physics | 5 | Active |
| US7265573B1 | Methods and structures for protecting programming data for a programmable logic device | Physics | 4 | Expired |
| US7795909B1 | High speed programming of programmable logic devices | Electricity | 3 | Active |
| US7237106B1 | System for loading configuration data into a configuration word register by independently loading a plurality of configuration blocks through a plurality of configuration inputs | Electricity | 2 | Expired |
| US6247155A | Tool to reconfigure pin connections between a DUT and a tester | Physics | 2 | Expired |
| US6625771B2 | Tool to reconfigure pin connections between a DUT and a tester | Physics | 2 | Expired |
| US7103813B1 | Method and apparatus for testing interconnect bridging faults in an FPGA | Physics | 2 | Expired |
| US8543876B1 | Method and apparatus for serial scan test data delivery | Physics | 2 | Active |
| US8800030B2 | Individualized time-to-live for reputation scores of computer files | Physics | 2 | Active |
| US8786301B1 | Apparatus for a low-cost semiconductor test interface system | Physics | 1 | Active |
| US11281195B2 | Integrated circuits with in-field diagnostic and repair capabilities | Electricity | 1 | Active |
| US7685485B2 | Functional failure analysis techniques for programmable integrated circuits | Physics | 1 | Expired |
| US7940082B1 | Circuits and method for bypassing a static configuration in a programmable logic device to implement a dynamic multiplexer | Electricity | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.