Semiconductor package having lead frame with an exposed base pad
US6114752A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 25, 1999 |
| Grant date | Sep 5, 2000 |
| Priority date | — |
| Expiry date | Aug 25, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a lead frame having a die pad for a semiconductor chip to be mounted thereon. The die pad is surrounded by a plurality of leads for electrically connecting the semiconductor chip and has one opening formed to decrease the attaching area between the semiconductor chip and the die pad so as to prevent the occurrence of declamination. A base pad is provided to be coupled to the die pad in such a manner that the base pad is positioned underneath or above the die pad and has a bottom surface or a top surface to be exposed to the extension of a resin encapsulant for enclosing the semiconductor chip and a portion of the lead frame, allowing the base pad to serve as a heat dissipater for transferring heat of the semiconductor package to the ambient.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.