Interrupt management system having batch mechanism for handling interrupt events
US6115779A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 21, 1999 |
| Grant date | Sep 5, 2000 |
| Priority date | — |
| Expiry date | Jan 21, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/2406
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An interrupt management system that enables a user to handle interrupt events either in a real time mode of operation, or in a batch mode of operation. In the real time mode, an interrupt request signal is asserted in response to each interrupt event. In the batch mode, an interrupt request signal is delayed until a predetermined number of interrupt events is detected, or until a predetermined time interval has elapsed since the last interrupt event is captured. In response to an interrupt event, the corresponding bit in an interrupt register is set to an active state. A control interrupt bit is provided in an interrupt control register for each interrupt to enable the activation of an interrupt request pin in response to the interrupt event. A batch enable bit is provided in a batch register for each interrupt event to enable the batching of the interrupt event.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.