Bistable fuse by amorphization of polysilicon
US6117745A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 4, 1998 |
| Grant date | Sep 12, 2000 |
| Priority date | — |
| Expiry date | Sep 4, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An embodiment of the instant invention is a method of substantially isolating an electrical device over a semiconductor substrate from a structure which collects charge, the method comprising the steps of: forming an insulating layer (layer 304) on the substrate; forming a conductive layer (layer 306) on the insulating layer; incorporating at least one element (element 310) into portions of the conductive layer so as to render that portion the conductive layer more resistive; and wherein the portion of the conductive layer which has been rendered more resistive (region 312) is rendered conductive after one or more charging events by subjecting the portion of the conductive layer to an elevated temperature. Preferably, the element is comprised of an element selected from the group comprised of: As, P, N, Ar, Si, H, B, Ge, C, Sb, F, Cl, O, any noble element, and any combination thereof and their isotopes. The structure which collects charge is, preferably, a conductive structure (structure 11) which collects charge during plasma processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.