Method for manufacturing a mis structure on silicon carbide (SiC)

US6117751A · kind A · utility

Assignee

• Siemens Aktiengesellschaft · DE

Inventors

• Reinhold Schoerner · Großenseebach, DE
• Peter Friedrichs · Koblenzer Straße, DE

Key dates

• Filing date: Jul 18, 1997
• Grant date: Sep 12, 2000
• Expiry date: Jul 18, 2017

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S438/931
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for producing a MIS structure on silicon carbide is provided. Given application of a known CVD method for occupying the surface of a SiC substrate provided with a gate oxide with the silicon serving as gate material, stationary positive charges arise in the region of the oxide/SiC boundary surface whose extremely high effective density (Q.sub.tot >10.sup.12 cm.sup.-2) disadvantageously influences the electrical properties of the finished component. The present method modifies the deposition conditions for the silicon serving as a gate material. Thus, the silicon is deposited from the vapor phase at a temperature of T<580.degree. C. and is thus amorphously applied. During the subsequent doping (drive-in of phosphorous at T>800.degree. C.), the amorphous silicon converts into the polycrystalline condition. Since the crystalline regions in the silicon layer can grow comparatively unimpeded and free of mechanical stresses, the effective density of the negative boundary surface charges arising in the gate oxide lies at values Q.sub.tot <10.sup.11 cm.sup.-2. The method is particularly applied in the manufacture of MOSFETs, MOS capacitors and the like.